computer engineering @ mcmaster & ntu singapore.
physical design intern @ amd.
Advanced Micro Devices (AMD)
May 2025 – Jan 2026Physical Design Engineering Intern (SoC)
- Designed master tile on Fusion Compiler and closed timing for interposer die on Data Center GPU.
- Integrated Python scripts into chip design flow to automate Synopsys PrimeTime STA data extraction.
- Developed LangChain LLM agents to automate PD tasks, reducing timing violation resolution time by 40%.
- Architected parallelized Python programs reducing memory overhead by 95%.
McMaster University (HADI Lab)
Sep 2025 – Dec 2025Research Assistant
- Designed calibration-free BMI decoder using Banditron RL with adaptive channel masking.
- Achieved 96% accuracy using only 3 MACs/inference at sub-mW power levels.